1. Field of the Invention
The present invention relates to a structure and method for improving the adhesion between a bonding pad, and a surface of an integrated circuit (IC).
2. Description of Related Art
FIG. 1 is a cross sectional diagram of a portion of prior art integrated circuit 100. Integrated circuit 100 includes a lightly doped p type silicon semiconductor substrate 101, doped semiconductor regions 102 and 103, gate oxide layer 104, polysilicon gate 105, insulating layers 106-108, passivation layer 109, metal layers 110-112, and bonding wire 114.
Semiconductor devices are formed along the upper surface of substrate 101 using fabrication techniques known in the art. For example, n type regions 102 and 103, gate oxide 104 and polysilicon gate 105 form a conventional n-channel MOS transistor. Gate oxide layer 104 is also formed along the upper surface of substrate 101. Polysilicon gate 105 is then formed by etching a polysilicon layer (not shown) which is formed over gate oxide layer 104.
Insulating layers 106-108 are alternately formed with metal layers 110-112 to form a multi-layer interconnect structure. Openings are formed in insulating layers 104 and 106-108 to allow portions of metal layers 110-112 to extend through insulating layers 104 and 106-108. Metal layers 110-112 variously interconnect the silicon regions. In the plane of FIG. 1., metal layers 110, 111 and 112 provide an electrical connection to n type region 102, metal layers 110 and 111 provide an electrical connection to n type region 102, and metal layer 110 provides an electrical connection to polysilicon gate 105.
Metal layer 112 includes metal bonding pad 116 and integral electrical connector 117 simultaneously formed on insulating layer 108. Metal bonding pad 116 and electrical connector 117 are typically aluminum or an aluminum alloy. In general, bonding pad 116 is formed near an edge of integrated circuit 100. Electrical connector 117 travels from bonding pad 116 along the upper surface of insulating layer 108 to the opening which extends through insulating layer 108. Passivation layer 109 is formed over metal layer 112. Opening 115 in metal layer 112 is formed to allow bonding wire 114 to be connected to bonding pad 116.
FIG. 2 is a top view of integrated circuit 100 which illustrates passivation layer 109, metal layer 112 (in dashed lines), and bonding wire 114. The other layers of integrated circuit 100 are not shown in FIG. 2. Bonding wire 114 provides an electrical connection between integrated circuit 100 and its external pins (not shown).
Methods for attaching bonding wire 114 to bonding pad 116 include conventional ultrasonic, thermosonic and thermocompression techniques. These techniques typically result in ball bond 113 being formed at the interface between bonding wire 114 and bonding pad 116. These techniques can also result in thermal and mechanical stresses within bonding pad 116. The stresses can cause the bonding pad 116 to become detached from insulating layer 108 and/or electrical connector 117. When this happens, integrated circuit 100 can be rendered non-functional. It would therefore be desirable to have a structure which provides increased adhesion and friction between bonding pad 116 and underlying insulating layer 108. It would also be desirable to have a simple and inexpensive method to provide this increased adhesion.